esim marathon

Sr. No.	Name	Organisation	Circuit Name	GitHub Link
1	Boddu Ajay	Rajiv Gandhi University of Knowledge Technologies, Nuzvid	A Low Power Dynamic Bitwidth-Adaptive Multiply Accumulate Unit for TinyML Accelerators using eSim	View
2	AJAY G NAYAK	NXP Semiconductors	Design and Analysis of a Gilbert Cell Mixer	View
3	Vipul Sharma	NIT Kurukshetra	Single Stage Common Source Cascode LNA Design at 1.5 GHz	View
4	Ashok M	Rajalakshmi Institute of Technology	Simulation of Quantum Circuits to Detect Water Traces in Post-War Zones	View
5	Kumar Biswajit Rath	National Institute of Technology Rourkela	Simulation and Performance Evaluation of a Folded Cascode Op-Amp in eSim Environment	View
6	Chinmaya Sharma	Indraprastha Institute of Information Technology Delhi	25% Duty Cycle Clock Generator with 50% frequency using eSim	View
7	Chirag Chiranjeevi	Manipal Institute of Technology	Design and Simulation of a 180nm CMOS Single-Stage Differential Pair
8	Digambar praksh wagholika	Shri Guru Gobind Singhji Institute of Engineering and Technology (SGGSIE&T), Vishnupuri, Nanded	12V BATTERY CHARGER WITH AUTOMATIC CUT-OFF	View
9	Nagaraj Venkatesh Reddy	Technische Universität Dresden	Bandgap Reference in BiCMOS Process	View
10	Neeraj Rajesh Piralkar	COEP Technological University	5-Transistor CMOS Operational Transconductance Amplifier (OTA)	View
11	Om Hajare	Indian Institute of Information Technology Nagpur	Current Mirror Using eSim IHP OpenPDK	View
12	Satyajeet Padhy	National Institute of Technology, Rourkela	8 - BIT ALU	View
13	Priyanka	Dronacharya group of institutions	A Highly Linear Low Power Envelop Detector
14	RITHIV KRISHNA P	SRI ESHWAR COLLEGE OF ENGINEERING	BUCK CONVERTER USING ESIM	View
15	RUPAWAANI K	Sri Manakula Vinayagar Engineering College	Smart Energy Theft Detection and Prevention System	VIew
16	SANA	BVRIT COLLEGE OF ENGINEERING FOR WOMEN	Neuromorphic Circuit Design: Integrate- and-Fire Neuron with STDP Synapse	View
17	Shrutika Sunil Wadibhasme	Yashwantrao Chavhan college of Engineering	Full subtractor using nand gate	View
18	Jyotsana Singh	Madan Mohan Malaviya University of Technology	SINGLE PHASE FULL BRIDGE INVERTER WITH RL LOAD	View
19	Catherin Jenira I	Rajalakshmi Institute of Technology	8-Input AND Gate Implementation Using 2-Input AND Gates	View
20	Bellana Venkata chaitanya	RGUKT	Design of Single Precision Floating Point Unit Using eSim	View
21	Sayyam vitalkar	Yeshwantrao Chavan College Of Engineering., Nagpur	Full adder using CMOS	View
22	T.SENTHIL KUMAR	KARPAGAM ACADEMY OF HIGHER EDUCATION	DESIGN OF D FLIP FLOP USING CMOS LOGIC	View
23	Harnoor Singh Khurana	Thapar Institute of technology, Patiala	Monostable Multivibrator using NE555 and Op-Amp
24	Mohd Maaz Quraishi	Jamia Millia Islamia	16-bit CORDIC Circuit Design and Simulation	View
25	Sanket Kar	Dr.B.C.Roy Engineering College, Durgapur	RING OSCILLATION	View