Skip to main content
Main navigation
Home
Team
Resources
Source Code
Downloads
Publications
Forum
Testimonials
Semester Long Internship 2026
PSPICE to KICAD Convertor
News & Events
News
Events
Partners
Contact us
Login
Search
Download Codes
Title of the lab
Please select...
BASIC ELECTRONICS LAB (SPICE SIMULATIONS) (Proposed by Prof Kavya Manohar)
Analog and Digital Integrated circuit Lab. (Proposed by Prof Priya Mule)
CMOS VLSI LAB (Proposed by Dr Lochan Jolly)
Digital Logic Design Lab (Proposed by Dr Dr.U.S.Ghodeswar)
NETWORK ANALYSIS (Proposed by Prof Ashish Pandya)
Open Source EDA Lab (Proposed by Dr Ajit Kumar Panda)
PCB Design (Proposed by Prof PROF. K. G. PANDE)
POWER ELECTRONICS SIMULATION LAB (Proposed by Prof HARISH BHAT N)
Simulation & Design Tools (Proposed by Prof Kishan K. Govani)
Test Lab ESIM (Proposed by Dr S Nikita)
Download Lab Solutions
About the Lab
Proposer Name:
Dr Dr.U.S.Ghodeswar
Title of the Lab:
Digital Logic Design Lab
Department:
Electronics Engineering
University:
Yeshwantrao chavan College of Engineering
Solution Provider
Solution Provider Name:
Dr Dr.U.S.Ghodeswar
Department:
Electronics Engineering
University:
Yeshwantrao chavan College of Engineering
Title of the experiment
Please select...
1. To verify truth tables of NOT gates
2. To verify truth tables of AND gates
3. To verify truth tables of NAND gates
4. To verify truth tables of OR gates
5. To verify truth tables of NOR gates
6. To verify truth tables of XOR gates
7. To verify the truth table of D flip Flop
8. To Verify truth table of SR Latch
Download Experiment
Title of the solution
Please select...
Download Solution
List of solution files
Filename
Type
